Renesas Electronics /R7FA6M3AH /USBHS /PHYSET

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PHYSET

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)DIRPD 0 (0)PLLRESET 0 (0)CDPEN 0 (00)CLKSEL 0 (00)REPSEL 0 (0)REPSTART 0 (0)HSEB

REPSEL=00, HSEB=0, CLKSEL=00, CDPEN=0, DIRPD=0, PLLRESET=0, REPSTART=0

Description

PHY Setting Register

Fields

DIRPD

Power-Down Control

0 (0): Does not enter low-power consumption mode

1 (1): Enter low-power consumption mode

PLLRESET

PLL Reset Control

0 (0): Disable PLL reset control for UTMI_PHY

1 (1): Enable PLL reset control for UTMI_PHY

CDPEN

Charging Downstream Port Enable

0 (0): Disable charging downstream port

1 (1): Enable charging downstream port

CLKSEL

Input System Clock Frequency

0 (00): Setting Prohibited

1 (01): 12 MHz

2 (10): 20 MHz

3 (11): 24 MHz

REPSEL

Terminating Resistance Adjustment Cycle

0 (00): No cycle is set.

1 (01): Adjust terminating resistance at 16-second intervals.

2 (10): Adjust terminating resistance at 64-second intervals.

3 (11): Adjust terminating resistance at 128-second intervals.

REPSTART

Forcibly Start Terminating Resistance Adjustment

0 (0): Terminating resistance adjustment is forcibly started

1 (1): Terminating resistance adjustment is not forcibly started

HSEB

CL-Only Mode

0 (0): CL-only mode is not activated.

1 (1): CL-only mode is activated.

Links

()